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ARM® and Thumb®-2 Instruction Set. Quick Reference Card. Key to Tables. Rm {, <opsh>} See Table Register, optionally shifted by constant. <Operand2>. Reference Data. CORE INSTRUCTION SET in Alphabetical Order by Mnemonic (1) FLAGS are 4 condition codes set by the ALU operation: Negative, Zero,ARM Addressing Modes. Quick Reference Card. Operation. §. Assembler. S updates Q GE Action. Parallel arithmetic. Halfword-wise addition. Quick reference card for ARMv7 (Cortex-M4). Group. Operation Syntax <omit> Let the assembler choose. Shift options Condition codes. <c>. Meanings. ARM® Instruction Set. Quick Reference Card. Key to Tables Refer to Table ARM architecture versions. Operation. §. Assembler. S updates. Q Action. ARM Instruction Set Quick Reference Card. Key to Tables. {cond}. Refer to Table Sets condition codes (optional). B. Byte operation (optional). ARM assembly language reference card. MOVcdS reg, arg copy argument (S = set flags). MVNcdS reg, arg copy bitwise NOT of argument. ANDcdS reg, reg, arg. This ARM assembly basics cheatsheet covers registers, instructions, branching, and conditional execution. You can use it as a guideline if you're starting